18-ho-2010-ue Advanced Digital Integrated Circuit Design

Course offering details

Instructors: Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal

Event type: Exercise

Org-unit: Dept. 18 - Electrical Engineering and Information Technology

Displayed in timetable as: Adv. Dig. Circ. Des.

Subject:

Crediting for:

Hours per week: 1

Language of instruction: Englisch

Min. | Max. participants: - | -

Course Contents:
1. Advanced CMOS Design Techniques
- CMOS technology and MOS models, static CMOS-based logic design,
complex gates, pass-transistor logic, transmission gates
- Dynamic CMOS logic, Precharge/Evaluation logic, DOMINO and NORA logic,
SRAM and DRAM

2. Characteristics and power consumption
- Dynamic behavior estimation
- Transistor design rules, I/O structures, power consumption, scaling,
yield

3. CAD tools and testing for VLSI design
- Editors for geometric and symbolic layout, Design Rule Check (DRC),
Extraction, Logic- and Switch-Level simulation
- Timing analysis, EDIF, VHDL, Testing of VLSI-Circuits: Fault modeling,
Test pattern generation and analysis, test methods, scan-path,
self-test, JTAG standard, test instruments

4. Design of digital subsystems
- Programmable Logic-Arrays (PLA), Structural Gate-Layout: Weinberger-
Arrays, Gate-Matrix-Layout, Optimized Layout using Euler-Graph method
- Gate-Arrays: basic structures, design examples, Finite State Maschines
- Programmable Logic devices (FPGA)
- Arithmetic units, systolic arrays

5. Microarchitecture of VLSI systems
- Design of datapath, Controller implementation
- Examples of system design

6. Analog VLSI systems
- Analog MOS signal processing, MOS circuit structures for D/A and A/D
converters, Sigma-Delta con
verter, implementation of filter (time continuous, switched capacitor)
- Analog Circuits for Modulator, Multiplier and PLLs

7. Hands-on problems of CMOS VLSI circuit design

Literature:
Circuit Design for CMOS VLSI, John Uyemura,
Kluwer Academic Publishers 1992.

Preconditions:
Electronics

Literature
Appointments
Date From To Room Instructors
1 Fri, 13. Apr. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
2 Fri, 20. Apr. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
3 Fri, 27. Apr. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
4 Fri, 4. May 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
5 Fri, 11. May 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
6 Fri, 18. May 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
7 Fri, 25. May 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
8 Fri, 1. Jun. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
9 Fri, 8. Jun. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
10 Fri, 15. Jun. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
11 Fri, 22. Jun. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
12 Fri, 29. Jun. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
13 Fri, 6. Jul. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
14 Fri, 13. Jul. 2012 08:55 09:40 S306/052 Prof. Dr.-Ing. Klaus Hofmann; Ashok Kumar Jaiswal
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Instructors
Prof. Dr.-Ing. Klaus Hofmann
Ashok Kumar Jaiswal